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date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation sp6203/6205 low noise, 300ma and 500ma cmos ldo regulators date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation very low dropout voltage: 0.6 1 pmos pass device accurate output voltage: 2% over temperature guaranteed 500ma output current: sp6205 ultra low noise output: 2 v rms with 0nf bypass unconditionally stable with 2.2 f ceramic low quiescent current: 5 a very low ground current: 350 a at 500 ma power-saving shutdown mode: < a fast turn-on and turn-off: 60 s fast transient response current limit and thermal shutdown protection very good load/line regulation: 0.07/0.0% excellent psrr: 67db < khz industry standard sot-23-5 and small pin 2x3 dfn package fixed output voltages: 2.5v, 2.7v, 2.v, 2.5v, 3.0v and 3.3v adjustable output available low noise, 300ma and 500ma cmos ldo regulators sp6203/6205 description cellular / gsm phones laptop / palmtop computers battery-powered systems pagers medical devices mp3/cd players digital still cameras features applications ? the sp6203/6205 are ultra low noise cmos ldos with very low dropout and ground current. the noise performance is achieved by means of an external bypass capacitor without sacrificing turn-on and turn-off speed critical to portable applications. extremely stable and easy to use, these devices offer excellent psrr and line/load regulation. target applications include battery-powered equipment such as portable and wireless products. regulators' ground current increases only slightly in dropout. fast turn-on/turn-off enable control and an internal 30 1 pull down on output allows quick discharge of output even under no load conditions. both ldos are protected with current limit and thermal shutdown. both ldos are available in fixed & adjustable output voltage versions and come in an industry standard sot-23 5-pin and small 2x3 pin dfn packages. for sc-70 00ma cmos ldo, sp623 is available. typical application circuit 3 2 1 c out 2.2 f ceramic v out v in en byp 4 5 sp6203 sp6205 5-pin fixed c in 2.2 f 3 2 1 c out 2.2 f ceramic v out v in en adj 4 5 sp6203 sp6205 5-pin adjustable c in 2.2 f now available in lead free packaging v out sp6203 sp6205 8 pin dfn v in nc v out byp gnd en nc 2 3 7 6 5 fixed sp6203 sp6205 8 pin dfn v in nc v out gnd en nc 2 3 7 6 5 adj nc adjustable s o l v e d b y t m
2 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 2 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation electrical specifications absolute maximum ratings supply input voltage (v in )..........................................................-2v to 6v output voltage (v out ).....................................................-0.6v to v i n +v enable input voltage (v e n )........................................................-2v to 6v power dissipation (p d )......................................internally limited, note lead temperature (soldering 5s)...........................................+260 c storage temperature.....................................................-65 c to +50 c junction temperature..........................................................+50 c these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. unless otherwise specified: v in =v out + 0.5v to 6v, c out = 2.2 f ceramic, c in = 2.2 f, i out =00 a, -0 c < t < 25 c. the z denotes the specifications which apply over full operating temperature range -0 c to +25 c, unless otherwise specified. parameter min typ max units z conditions input voltage 6 v z output voltage accuracy -2 +2 % z variation from specified v out output voltage 50 ppm/ c 6 v out / 6 t temperature coefficient, note2 reference voltage .225 .25 .275 v z adjustable version only line regulation 0.0 0.3 %/v 6 v out (v in below 6v) load regulation, note 3 0.07 0.3 % i out = 0.ma to 300ma (sp6203) 0.3 0.5 i out = 0.ma to 500ma (sp6205) dropout voltage for v out > 3.0v, 0.06 i out = 0.ma note 60 i out = 00ma 20 mv i out = 200ma 0 300 z i out = 300ma (sp6203) 300 500 z i out = 500ma (sp6205) ground pin current, note 5 5 00 z i out = 0.ma (i q u i e s c e n t ) 0 i out = 00ma 75 a i out = 200ma 235 330 z i out = 300ma (sp6203) 350 0 z i out = 500ma (sp6205) shutdown supply current 0.0 a z v en < 0.v (shutdown) current limit 0.33 0.50 0. a v out = zerov (sp6203) 0.55 0.5 . v out = zerov (sp6205) thermal shutdown junction 70 c regulator turns off temperature thermal shutdown hysteresis 2 c regulator turns on again at 5 c power supply rejection ratio 67 db f ) khz output noise voltage, note 6 50 c byp = 0nf, i out = 0.ma 630 c byp = 0nf, i out =300ma 2 v rms c byp = 0nf, i out = 0.ma 50 75 c byp = 0nf, i out = 300ma thermal regulation, note 7 0.05 %/w 6 v out / 6 p d wake-up time (t wu ), note 25 50 s v in * v, note 0 (from shutdown mode) i out = 30ma turn-on time (t on ), note 60 20 s v in * v, note 0 (from shutdown mode) i out = 30ma turn-off time (t off ), 00 250 s i out = 0.ma, v in * v, note 0 5 25 i out = 300ma, v in * v, note 0 output discharge resistance 30 1 no load enable input logic low voltage 0. v z regulator shutdown enable input logic high voltage .6 v z regulator enabled input voltage (v in )...........................................+2.7v to +5.5v enable input voltage (v en )...........................................0 to 5.5v junction temperature (t j )...........................................-0 c to +25 c thermal resistance, sot-23-5 ( e ja )...........................................note thermal resistance, sot-23-6 ( e ja )...........................................note remark: the device is not guaranteed to function outside its operating rating. operating ratings
3 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 3 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation electrical specifications notes note 1: maximum power dissipation can be calculated using the formula: p d = (t j(max) - t a ) / ee eee ja , where t j(max) is the junction temperature, t a is the ambient temperature and e ja is the junction-to-ambient thermal resistance. e jc is 6 c/w for this package . exceeding the maximum allowable power dissipation will result in excessive die temperature and the regulator will go into thermal shutdown mode. e ja is 191 c/w for sot-23-5, and is 59 c/w for the -pin dfn. a part mounted on a pc board will deliver improved thermal performance based upon copper surface area. note 2: output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. note 3: regulation is measured at constant junction temperature using low duty cycle pulse testing. changes in output voltage due to heating effects are covered by the thermal regulation specification. note 4: dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at v differential. note 5: ground pin current is the regulator quiescent current. the total current drawn from the supply is the sum of the load current plus the ground pin current. note 6: output noise voltage is defined within a certain bandwidth, namely 0hz < bw < 00khz. an external bypass cap (0nf) from reference output (byp pin) to ground significantly reduces noise at output. note 7: thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, excluding load and line regulation effects. specifications are for a 300ma load pulse at v in = 6v for t = ms. note 8: the wake-up time (t wu ) is defined as the time it takes for the output to start rising after enable is brought high. note 9: the total turn-on time is called the settling time (t s ), which is defined as the condition when both the output and the bypass node are within 2% of their fully enabled values when released from shutdown. note 10: for output voltage versions requiring vin to be lower than v, timing (t on & t off ) increases slightly. (optional) cbyp v out byp en v in gnd bandgap reference thermal shutdown & current limit 1.25v r2 r1 adj v out en v in gnd bandga p re f erenc e t hermal shu t dow n & c urren t limi t 1.25v low noise fixed regulator - 5 pin low noise adjustable regulator - 5 pin functional diagram
date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation pin description pin number name function v in power supply input 2 gnd ground terminal 3 en enable/shutdown (logic high = enable, logic low = shutdown) (fixed) byp reference bypass input for ultra-quiet operation. connecting a 0nf cap on this pin reduces output noise. (adj.) adj adjustable (input): adjustable regulator feed - back input. connect to a resistive voltage- divider network. 5 v out regulator output voltage 5 pin option fixed voltage regulator adjustable voltage regulator v in gnd en v out byp sipex 4 3 5 1 2 v in gnd en v out adj 4 3 5 12 sipex sipex pinout 5 pin sot-23
5 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 5 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation pin dfn pin configuration pin number name function (fixed) v out regulator output voltage. connect to pin v out. (adj) adj adjustable (input): adjustable regulator feed - back input. connect to a resistive voltage- divider network. 2(fixed) byp reference bypass input for ultra-quiet operation. connecting a 0nf cap on this pin reduces output noise. 2(adj) nc no connect 3 gnd ground en enable/shutdown (logic high = enable, logic low = shutdown) 5 v in power supply input 6 nc no connect 7 nc no connect v out regulator output voltagea pin description pinout 8 pin dfn 8 pin option v out sp6203 sp6205 8 pin dfn v in nc v out byp gnd en nc 2 3 7 6 5 fixed sp6203 sp6205 8 pin dfn v in nc v out gnd en nc 2 3 7 6 5 adj nc adjustable
6 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 6 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation typical performance characteristics v out i o (200ma/div) v out v en v out v en v out v en v out (ac) i out v out (ac) v in current limit turn on time, r load = 50 1 (60ma) turn off time, r load = 6 1 (500ma) turn off time, r load = 30k (0.1ma) line regulation, line step from 4v to 6v, i o = 1ma load regulation, i o = 100 a ~ 500ma
7 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 7 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation typical performance characteristics: continued v en v out v in = 3.5v, i o = 500ma v in v out byp v in v out byp v in v out byp v in v out byp start up waveform, v in = 3.5v, i o = 500ma start up waveform, slow v in , no load start up waveform, slow v in , c out =1000 f, i o =0ma start up waveform, slow v in , 500ma output load start up waveform, slow v in , c out =1000 f, i o =500ma v in v out byp fast v in , no load
date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation typical performance characteristics: continued v in v out byp fast v in = 1000 f output load fast v in , 500ma output load v in v out byp fast v in , c out =1000 f, i o =500ma output noise (uvrms), cbyp = 10nf 0 0 20 30 0 50 0. 0 00 000 output current (ma) noise (uvrms) output noise (uvrms), cbyp = open 0 200 00 600 00 000 0. 0 00 000 output current (ma) noise (uvrms)
date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation general overview the sp6203/6205 is intended for applications where very low dropout voltage, low supply current and low output noise are critical, even with high load conditions (500ma maximum). unlike bipolar regulators, the sp6203/6205 (cmos ldo) supply current increases only slightly with load current. the sp6203/6205 contains an internal bandgap reference which is fed into the inverting input of the ldo-amplifier. the output voltage is then set by means of a resistor divider and compared to the bandgap reference voltage. the error ldo-amplifier drives the gate of a p-channel mosfet pass device that has a r d s ( o n ) of 0.6 1 at 500ma producing a 300mv drop at the out - put. furthermore, the sp6203/6205 has its own cur - rent limit circuitry (500ma/850ma) to ensure that the output current will not damage the device during output short, overload or start-up. also, the sp6203/6205 includes thermal shut - down circuitry to turn off the device when the junction temperature exceeds 170 c and it re - mains off until the temperature drops by 12 c. enable/shutdown operation the sp6203/6205 is turned off by pulling the v en pin below 0.4v and turned on by pulling it above 1.6v. if this enable/shutdown feature is not required, it should be tied directly to the input supply voltage to keep the regulator output on at all time. while in shutdown, v out quickly falls to zero (turn-off time is dependent on load conditions and output capacitance on v out ) and power consumption drops nearly to zero. input capacitor a small capacitor of 2.2 f is required from v in to gnd if a battery is used as the power source. any good quality electrolytic, ceramic or tantalum capacitor may be used at the input. output capacitor an output capacitor is required between v out and gnd to prevent oscillation. a 2.2 f output capacitor is recommended. larger values make the chip more stable which means an improvement of the regulator?s tran - sient response. also, when operating from other sources than batteries, supply-noise rejection can be improved by increasing the value of the input and output capacitors and using passive filtering techniques. for a lower output current, a smaller output capacitance can be chosen. finally, the output capacitor should have an effective series resistance (esr) of 0.5 1 or less. therefore, the use of good quality ceramic or tantalum capacitors is advised. bypass capacitor a bypass pin (byp) is provided to decouple the bandgap reference. a 10nf external capacitor connected from byp to gnd reduces noise present on the internal reference, which in turn significantly reduces output noise and also im - proves power supply rejection. note that the minimum value of c out must be increased to maintain stability when the bypass capacitor is used because c byp reduces the regulator phase margin. if output noise is not a concern, this input may be left unconnected. larger capacitor values may be used to further improve power supply rejection, but result in a longer time period (slower turn on) to settle output voltage when power is initially applied. no load stability the sp6203/6205 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other volt - age regulators. this is especially important in cmos ram battery back-up applications. theory of operation
0 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation 0 date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation theory of operation: continued turn on time the turn on response is split up in two separate response categories: the wake up time (t wu ) and the settlling time (t s ). the wake up time is defined as the time it takes for the output to rise to 2% of its total value after being released from shutdown (e n > 0.4v). the settling time is defined as the condition where the output reaches 98% of its total value after being released from shutdown. the latter is also called the turn on time and is dependent on the output capacitor, a little bit on load and, if present, on a bypass capacitor. t j ( m a x ) is the maximum junction temperature of the die and is 125 c. t a is the ambient tempera - ture. e ja is the junction-to-ambient thermal re - sistance for the regulator and is layout depen - dent. the sot-23-5 package has a e j a of approximately 256 c/w for minimum pcb copper footprint area. this results in a maximum power dissipation of: p d ( m a x ) = [(125 c - 25 c)/(191 c/w)] = 523mw the actual power dissipation of the regulator circuit can be determined using one simple equation: p d = (v i n - v o u t ) * i out + v i n * i gnd to prevent the device from entering thermal shutdown. maximum power dissipation can not be exceeded. substituting p d ( m a x ) for p d and solving for the operating conditions that are critical to the ap - plication will give the maximum operating con - ditions for the regulator circuit. for example, if we are operating the sp6203 3.0v at room temperature, with a minimum footprint layout and and output current of 300ma, the maximum input voltage can be determined, based on the equation below. ground pin current can be taken from the electrical specifications table (0.23ma at 300ma). 390mw = (v in -3.0v) * 300ma + v in *0.23ma after calculations, we find that the maximum input voltage of a 3.0v application at 300ma of output current in a sot-23-5 package is 4.7v. so if the intend is to operate a 5v output version from a 6v supply at 300ma load and at a 25 c ambient temperature, then the actual total power dissipation will be: p d =([6v-5v]*[300ma])+(6v*0.23ma)=301.4 mw this is well below the 523mw package maxi - mum. therefore, the regulator can be used. turn off time the turn off time is defined as the condition where the output voltage drops about 66% ( e ) of its total value. 5 e to 7 e is the constant where the output voltage drops nearly to zero. there will always be a small voltage drop in shutdown because of the switch unless we short-circuit it. the turn off time of the output voltage is depen - dent on load conditions, output capacitance on v out (time constant o = r l c l ) and also on the difference in voltage between input and output. thermal considerations the sp6203/6205 is designed to provide 300/ 500 ma of continuous current in a tiny package. maximum power dissipation can be calculated based on the output current and the voltage drop across the part. to determine the maximum power dissipation of the package, use the junc - tion-to-ambient thermal resistance of the device and the following basic equation: p d = (t j ( m a x ) - t a ) / e j a 2% t(s) = t(on) % t(wu) v out v enable
date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation note that the regulator cannot always be used at its maximum current rating. for example, in a 5v input to 3.0v output application at an ambi - ent temperature of 25 c and operating at the full 500ma (i gnd = 0.355ma) load, the regulator is limited to a much lower load current, deter - mined by the following equation: 523mw = ( [5v-3v]*[ i l o a d ( m a x ) ]) +(5v*0.350ma) after calculation, we find that in such an appli - cation (sp6205) the regulator is limited to 260.6ma. doing the same calculations for the 300ma ldo (sp6203) will limit the regulator?s output current to 260.9ma. also, taking advantage of the very low dropout voltage characteristics of the sp6203/6205, power dissipation can be reduced by using the lowest possible input voltage to minimize the input-to-output drop. adjustable regulator applications the sp6203/6205 can be adjusted to a specific output voltage by using two external resistors (see functional diagram). the resistors set the output voltage based on the following equation: v out = v r e f *(r1/r2 + 1) resistor values are not critical because adj (adjust) has a high input impedance, but for best performance use resistors of 470k 1 or less. a bypass capacitor from adj to v out provides improved noise performance. dual-supply operation when used in dual supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground. layout considerations the primary path of heat conduction out of the package is via the package leads. therefore, careful considerations have to be taken into account: 1) attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on pcb?s where there are internal ground and power planes. 2) place the input, output and bypass capacitors close to the device for optimal transient re - sponse and device behavior. 3) connect all ground connections directly to the ground plane. in case there?s no ground plane, connect to a common local ground point before connecting to board ground. such layouts will provide a much better thermal conductivity (lower e ja ) for, a higher maximum allowable power dissipation limit. theory of operation: continued
2 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation package: 5pin sot-23
3 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation package: 8pin dfn
date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation s o l v e d b y t m part number top marking temperature range voltage option package type sp6203em5-- n2ww -40?c to +125?c .v 5 pin sot-23 sp6203em5--/tr n2ww -40?c to +125?c .v 5 pin sot-23 sp6203em5-2-5 l2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-5/tr l2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-7 g2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6203em5-2-7/tr g2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6203em5-2- q3ww -40?c to +125?c 2.v 5 pin sot-23 sp6203em5-2-/tr q3ww -40?c to +125?c 2.v 5 pin sot-23 sp6203em5-2-5 h2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-5/tr h2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-3-0 m2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6203em5-3-0/tr m2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6203em5-3-3 j2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6203em5-3-3/tr j2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6203em5 q2ww -40?c to +125?c adj 5 pin sot-23 sp6203em5/tr q2ww -40?c to +125?c adj 5 pin sot-23 sp6203er-- 6203yww -40?c to +125?c .v pin dfn sp6203er--/tr 6203yww -40?c to +125?c .v pin dfn sp6203er-2-5 620325yww -40?c to +125?c 2.5v pin dfn sp6203er-2-5/tr 620325yww -40?c to +125?c 2.5v pin dfn sp6203er-2-7 620327yww -40?c to +125?c 2.7v pin dfn sp6203er-2-7/tr 620327yww -40?c to +125?c 2.7v pin dfn sp6203er-2- 62032yww -40?c to +125?c 2.v pin dfn sp6203er-2-/tr 62032yww -40?c to +125?c 2.v pin dfn sp6203er-2-5 62035yww -40?c to +125?c 2.5v pin dfn sp6203er-2-5/tr 62035yww -40?c to +125?c 2.5v pin dfn sp6203er-3-0 620330yww -40?c to +125?c 3.0v pin dfn sp6203er-3-0/tr 620330yww -40?c to +125?c 3.0v pin dfn sp6203er-3-3 620333yww -40?c to +125?c 3.3v pin dfn sp6203er-3-3/tr 620333yww -40?c to +125?c 3.3v pin dfn sp6203er 6203eryww -40?c to +125?c adj pin dfn sp6203er/tr 6203eryww -40?c to +125?c adj pin dfn ordering information
5 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation part number top marking temperature range voltage option package type sp6203em5-- n2ww -40?c to +125?c .v 5 pin sot-23 sp6203em5--/tr n2ww -40?c to +125?c .v 5 pin sot-23 sp6203em5-2-5 l2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-5/tr l2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-7 g2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6203em5-2-7/tr g2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6203em5-2- q3ww -40?c to +125?c 2.v 5 pin sot-23 sp6203em5-2-/tr q3ww -40?c to +125?c 2.v 5 pin sot-23 sp6203em5-2-5 h2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-2-5/tr h2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6203em5-3-0 m2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6203em5-3-0/tr m2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6203em5-3-3 j2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6203em5-3-3/tr j2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6203em5 q2ww -40?c to +125?c adj 5 pin sot-23 sp6203em5/tr q2ww -40?c to +125?c adj 5 pin sot-23 sp6203er-- 6203yww -40?c to +125?c .v pin dfn sp6203er--/tr 6203yww -40?c to +125?c .v pin dfn sp6203er-2-5 620325yww -40?c to +125?c 2.5v pin dfn sp6203er-2-5/tr 620325yww -40?c to +125?c 2.5v pin dfn sp6203er-2-7 620327yww -40?c to +125?c 2.7v pin dfn sp6203er-2-7/tr 620327yww -40?c to +125?c 2.7v pin dfn sp6203er-2- 62032yww -40?c to +125?c 2.v pin dfn sp6203er-2-/tr 62032yww -40?c to +125?c 2.v pin dfn sp6203er-2-5 62035yww -40?c to +125?c 2.5v pin dfn sp6203er-2-5/tr 62035yww -40?c to +125?c 2.5v pin dfn sp6203er-3-0 620330yww -40?c to +125?c 3.0v pin dfn sp6203er-3-0/tr 620330yww -40?c to +125?c 3.0v pin dfn sp6203er-3-3 620333yww -40?c to +125?c 3.3v pin dfn sp6203er-3-3/tr 620333yww -40?c to +125?c 3.3v pin dfn sp6203er 6203eryww -40?c to +125?c adj pin dfn sp6203er/tr 6203eryww -40?c to +125?c adj pin dfn part number top marking temperature range voltage option package type sp6205em5-- x2ww -40?c to +125?c .v 5 pin sot-23 sp6205em5--/tr x2ww -40?c to +125?c .v 5 pin sot-23 sp6205em5-2-5 v2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6205em5-2-5/tr v2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6205em5-2-7 r2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6205em5-2-7/tr r2ww -40?c to +125?c 2.7v 5 pin sot-23 sp6205em5-2- e3ww -40?c to +125?c 2.v 5 pin sot-23 sp6205em5-2-/tr e3ww -40?c to +125?c 2.v 5 pin sot-23 sp6205em5-2-5 s2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6205em5-2-5/tr s2ww -40?c to +125?c 2.5v 5 pin sot-23 sp6205em5-3-0 w2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6205em5-3-0/tr w2ww -40?c to +125?c 3.0v 5 pin sot-23 sp6205em5-3-3 t2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6205em5-3-3/tr t2ww -40?c to +125?c 3.3v 5 pin sot-23 sp6205em5 a3ww -40?c to +125?c adj 5 pin sot-23 sp6205em5 /tr a3ww -40?c to +125?c adj 5 pin sot-23 sp6205er-- 6205yww -40?c to +125?c .v pin dfn sp6205er--/tr 6205yww -40?c to +125?c .v pin dfn sp6205er-2-5 620525yww -40?c to +125?c 2.5v pin dfn sp6205er-2-5/tr 620525yww -40?c to +125?c 2.5v pin dfn sp6205er-2-7 620527yww -40?c to +125?c 2.7v pin dfn sp6205er-2-7/tr 620527yww -40?c to +125?c 2.7v pin dfn sp6205er-2- 62052yww -40?c to +125?c 2.v pin dfn sp6205er-2-/tr 62052yww -40?c to +125?c 2.v pin dfn sp6205er-2-5 62055yww -40?c to +125?c 2.5v pin dfn sp6205er-2-5/tr 62055yww -40?c to +125?c 2.5v pin dfn sp6205er-3-0 620530yww -40?c to +125?c 3.0v pin dfn sp6205er-3-0/tr 620530yww -40?c to +125?c 3.0v pin dfn sp6205er-3-3 620533yww -40?c to +125?c 3.3v pin dfn sp6205er-3-3/tr 620533yww -40?c to +125?c 3.3v pin dfn sp6205er 6205eryww -40?c to +125?c adj pin dfn sp6205er /tr 6205eryww -40?c to +125?c adj pin dfn ordering information s o l v e d b y t m
6 date: apr2-07 sp6203/sp6205 low noise, 300 and 500ma cmos ldo regulators ? 2007 sipex corporation date: 2//05 sp6203/6205 low noise, 300 and 500ma cmos ldo regulators ? copyright 2005 sipex corporation general overview the sp6203/6205 is intended for applications where very low dropout voltage, low supply current and low output noise are critical, even with high load conditions (500ma maximum). unlike bipolar regulators, the sp6203/6205 (cmos ldo) supply current increases only slightly with load current. the sp6203/6205 contains an internal bandgap reference which is fed into the inverting input of the ldo-amplifier. the output voltage is then set by means of a resistor divider and compared to the bandgap reference voltage. the error ldo-amplifier drives the gate of a p-channel mosfet pass device that has a r d s ( o n ) of 0.6 1 at 500ma producing a 300mv drop at the out - put. furthermore, the sp6203/6205 has its own cur - rent limit circuitry (500ma/850ma) to ensure that the output current will not damage the device during output short, overload or start-up. also, the sp6203/6205 includes thermal shut - down circuitry to turn off the device when the junction temperature exceeds 170 c and it re - mains off until the temperature drops by 12 c. enable/shutdown operation the sp6203/6205 is turned off by pulling the v en pin below 0.4v and turned on by pulling it above 1.6v. if this enable/shutdown feature is not required, it should be tied directly to the input supply voltage to keep the regulator output on at all time. while in shutdown, v out quickly falls to zero (turn-off time is dependent on load conditions and output capacitance on v out ) and power consumption drops nearly to zero. input capacitor a small capacitor of 2.2 f is required from v in to gnd if a battery is used as the power source. any good quality electrolytic, ceramic or tantalum capacitor may be used at the input. output capacitor an output capacitor is required between v out and gnd to prevent oscillation. a 2.2 f output capacitor is recommended. larger values make the chip more stable which means an improvement of the regulator?s tran - sient response. also, when operating from other sources than batteries, supply-noise rejection can be improved by increasing the value of the input and output capacitors and using passive filtering techniques. for a lower output current, a smaller output capacitance can be chosen. finally, the output capacitor should have an effective series resistance (esr) of 0.5 1 or less. therefore, the use of good quality ceramic or tantalum capacitors is advised. bypass capacitor a bypass pin (byp) is provided to decouple the bandgap reference. a 10nf external capacitor connected from byp to gnd reduces noise present on the internal reference, which in turn significantly reduces output noise and also im - proves power supply rejection. note that the minimum value of c out must be increased to maintain stability when the bypass capacitor is used because c byp reduces the regulator phase margin. if output noise is not a concern, this input may be left unconnected. larger capacitor values may be used to further improve power supply rejection, but result in a longer time period (slower turn on) to settle output voltage when power is initially applied. no load stability the sp6203/6205 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other volt - age regulators. this is especially important in cmos ram battery back-up applications. theory of operation sipex corporation headquarters and sales offce 233 south hillview drive milpitas, ca 5035 tel: (0) 3-7500 fax: ( 0) 35-7600 sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. solved by tm for further assistance: ssolfdwlrq qrwh dqg fdofxodwru oh iru 7hupdo frqvlghudwlrqv zlw /lqhdu regulators: anp 2 ldo thermal considerations for linear regulator s [pdf] anp 3 ldo linear regulator heat calculato r [excel] email: sipexsupport@sipex.com www support page: http://www.sipex.com/content.aspx?p=support sipex application notes: http://www.sipex.com/applicationnotes.aspx

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